The 2024 Open Compute Project Foundation (OCP) Global Summit drew some 7,000 visitors, and its success was apparent at registration: long lines of people trying to get their badges, no nearby parking if you were coming by car, and a packed show floor keen to learn about the latest initiatives from OCP members and exhibitors.

The main opening announcement from OCP was the expansion of its “Open Systems for AI Strategic Initiative,” with contributions from Nvidia with its MGX-based GB200-NVL72 platform and “in-progress contributions” from Meta. This specific community effort was launched in January 2024, with leadership provided by Intel, Microsoft, Google, Meta, NVIDIA, AMD, ARM, Ampere, Samsung, Seagate, SuperMicro, Dell, and Broadcom, with the objective being to establish commonalities and develop open standardizations for AI clusters and the data center facilities that host them.

At the show, Meta announced what it said were two new milestones for its data centers: a next-generation network fabric for AI and a new portfolio of network hardware developed in conjunction with multiple vendors. The company’s disaggregated scheduled fabric (DSF) for AI clusters is aimed at open, vendor-agnostic systems with interchangeable building blocks from vendors across the industry, allowing them to build large, non-blocking fabrics to support high-bandwidth AI clusters, according to Meta.

Among the products Meta announced are an ASIC for FBNIC. The FBNIC is a multi-host foundational NIC designed by Marvell and contains the first of Meta’s own network ASICs for the company’s server fleet and MTIA solutions, supporting up to four hosts with complete data path isolation for each host. The FBNIC driver has been upstreamed (available from v6.11 kernel)

Through the show, the themes I kept hearing were around “advancing efficiency, sustainability and enabling the development of a multi-vendor supply chain.”

Chiplet markeplace

One of the bigger announcements from OCP was the launch of the foundation’s chiplet marketplace, which it said would be an important step in establishing an open chiplet economy.  The site, which currently lists 17 chiplet and IP products, is intended to provide a place where system-in-package (SiP) designers and builders can find the latest available standalone chiplets, design and manufacturing services, chiplet-aware EDA tools, and reference material needed to build chiplet-based products.

In its press statement, the OCP quoted its open chiplet economy project co-leads, Anu Ramamurthy and Jawad Nasrullah, saying, “While incorporating third-party known-good dies into a chip design is not yet straightforward, ongoing efforts at OCP are paving the way for this future. Current near-term challenges being addressed by the OCP community include developing advanced 3D-IC design kits that streamline chiplet integration with today’s EDA tools, establishing standardized form factors to simplify chiplet-based designs, and extending chiplet interconnect standards to serve high-volume markets, including automotive sectors using older nodes. Additionally, the OCP community is exploring new solutions for chiplet-based testing and creating specialized chiplets tailored for HPC and AI applications, bringing us closer to a more accessible and innovative chiplet ecosystem.”

To understand this more, we caught up with Steve Helvie, VP of emerging markets at OCP, to learn more about the chiplet marketplace announcement, and more.