MUNICH, Germany – Analog AI chip company Blumind showed off test silicon for its keyword spotting chip, which uses 10 nJ per inference, at electronica 2024.

“What’s been particularly gratifying is that over the last year, there’s been more pull than us pushing, people have been coming to us specifically asking for analog AI solutions because they believe something new needs to happen, and this is the only realistic path that could get to production,” Blumind co-founder Niraj Mathur told EE Times.

Wearable devices are top of the list of target applications, but customers are also coming to Blumind with applications like automotive and healthcare in mind. One customer wanted to built a tire pressure monitoring system (TPMS) with an accelerometer to calculate details of road conditions.

“It’s great for an autonomous vehicle if it can tell whether it’s driving on snow, ice, gravel or whatever,” Mathur said. “They need extreme power efficiency because it’s sitting in the tire, it’s got to last the lifetime of the tire, you don’t want to open up the tire to change the battery. That’s a great use case for us.”

Another potential customer wanted to detect signals from the heart to look for anomalies, with the sensor inside a pacemaker and powered by energy harvesting from the movement of surrounding muscles. This application had only a couple of hundred of nanoWatts power budget, Mathur said

Blumind’s first product, an analog keyword spotting chip, now has a production version that the company is working on with a large lead customer for a wearable device. It should reach full volume production next year, and will come in a standalone chip format or as a small chiplet, which would work well in the same package as an MCU, Mathur said.

“[Chiplets] are the other avenue of integration for our customers, which is very appealing for a lot of the MCU guys, who you might think we compete with, but we don’t,” he said. “They offer a fully programmable MCU solution with bells and whistles, while we are focused on always-on AI. They can integrate us as a chiplet into their MCU package.”

The company is exploring this option with some MCU makers, he added.

Blumind uses a single transistor for its analog multiply-accumulate scheme. The transistor stores a weight, which is multiplied by an input signal. Charge is then accumulated on a capacitor. A proprietary scheme measures the resulting charge and generates an output proportional to it, which represents the activation. Calculations are ratiometric, meaning the scheme is insensitive to process, voltage and temperature.  

Blumind refers to its architecture as configurable, rather than fully programmable.

“This is an ASSP, not an ASIC,” Mathur said. “We have a certain amount of resources that we decide at tape out, so we target a certain set of applications, a certain zoo of models, and we give you some knobs to modify that.”

The keyword spotting chip—which aids sensor applications (time-series data)—supports up to 0.5 MB of parameters on-chip, but this can be arranged as three parallel networks of five layers each, or a single network with 15 layers, per Mathur’s example. Customers have the flexibility to update weights in the network, which is sufficient for most use cases.This level of flexibility does not extend to convolutional neural networks (CNNs) commonly used in vision applications, which will require a different tape out. Blumind’s second chip will be optimized for vision CNNs on data from cameras, lidars or ultrasonic sensors, and it will inference models with around 10 MB of parameters maximum. This chip is under development and due in production in 2026.

Beyond that, Mathur said, the technology has significant potential for scaling up. He envisions a much bigger, multi-die chip with space for hundreds of megabytes or a gigabyte of parameters, like a small LLM.

“That’s on the roadmap, that’s got a lot of interest,” he said. “We are pursuing it, but we don’t want to get too far ahead of the use cases, which are still unclear…it’s unclear whether extreme efficiency is needed or where it will be needed. Those devices haven’t emerged yet.”

This larger device could be a multi-die chiplet solution, but in analog—so without external memory or high-speed buses and clocks (Blumind’s architecture is asynchronous/event-based). Simple wire bonds can be used in place of more expensive interconnects, which are relatively cheap, he said. Overall, 1000 TOPS/W is within reach.

This hypothetical device could feature more programmability, if the market demands it. The company is also working with partners on compression technologies for LLMs. Because Blumind’s analog technology uses older process nodes, it is relatively cheap to tape out new chips, and the architecture tiles easily, Mathur said.

“The rationale pushing us to multi-die is kind of similar to digital, but the way we implement it is completely different,” he said. “The technologies and the price point we need to deliver this solution is way lower than the digital guys.”

Blumind’s current technology benefits from staying in the analog domain—where the sensor data originates—so ADCs are not needed. Could the same power efficiency be expected for digital data fed into an analog LLM accelerator?

“For the tiny networks, having the analog sensor input is very valuable at the system level,” he said. “In the scaled up version, the neural networks are big power hogs. So if we bring the power down for the neural network, that’s still very meaningful, from an overall system level…it’s relative. Even if you need an ADC at the front for the scaled up version, relatively speaking, it’s still going to be a smaller chunk of energy [required by] the system.”

Mathur stressed that this multi-die device is further into the future than its keyword spotting and tiny vision chips.

“There’s a lot of pull for [the scaled-up version], people’s eyes open up when we show our numbers—so it may be that we get a big supporter to accelerate that one, but the use cases need to be thought out more clearly,” he said. “But we don’t want to get ahead of ourselves, because no-one has really brought analog compute to high volume production and delivered on its promise.”

“We want to be the first to do that, but we want to walk before we try and run,” he added.